超大规模集成电路设计优化 (VLSI Design Optimization) |
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| 上课时间：星期五 上午 3,4,5 9:45-12:10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 上课地点：3A111 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 答疑时间：周五 14:00 - 15:00，科技实验楼西楼720，或发邮件至songch@ustc.edu.cn | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 电话：0551-63602675 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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Schedule [lecture notes are downloadable inside the campus] |
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| Lecture | Date | Topic | Slides | References | Assignments | Due |
| 1 | March 1, 2013 | Guidance, Design Methodologies | ppt pdf | [4].Chapter_14 | ||
| 2 | March 8, 2013 | Logic Design Optimization | ppt pdf | [2].Chapter_6 | ||
| 3 | March 15, 2013 | Netlist and System Partitioning | ppt pdf | [1].Chapter_2 | ProblemSet01(doc pdf ) | |
| 4 | March 22, 2013 | Chip Planning | ppt pdf | [1].Chapter_2 [2].Chapter_10 | ||
| 5 | March 29, 2013 | Timing | ppt pdf | [4].Chapter_10 | ProblemSet01 | |
| 6 | April 7, 2013 | Delay | ppt pdf | [4].Chapter4 and Chapter 6 | ProblemSet02(doc pdf) | Solution01 |
| 7 | April 12, 2013 | Power | ppt pdf | [4].Chapter5 | ||
| 8 | April 19, 2013 | Placement | ppt pdf | [2].Chapter11 Placement-Examples | ||
| 9 | April 26, 2013 | Routing I | ppt pdf | [2].Chapter12 Routing-Examples-1 | ProblemSet03(doc pdf) | ProblemSet02 |
| 10 | May 3, 2013 | Routing II | ppt pdf | [2].Chapter12 | Lab-1: LogicSynLab-Tutorial Server.Login.Tutorial | Solution02 |
| 11 | May 10, 2013 | Routing III | ppt pdf | [2].Chapter13 [4].Chapter 13 Routing-Examples-2 | ||
| 12 | May 17, 2013 | Static Timing Analysis (STA) | ppt pdf | [1].Chapter8, STA-NanoCircuits.A.Practical.Method | ||
| 13 | May 24, 2013 | Electronic System Level-design and High-level Synthesis | ppt pdf | [2].Chapter5 | ProblemSet04(doc pdf) | Project Proposal |
| 14 | June 7, 2013 | Manufacturability, Reliability and Summary | ppt pdf | [3] | Solution03 | |
| 15 | June 14, 2013 | Course Project Check | ||||
| 16 | June 21, 2013 | Final Examamination | Solution04 |
[1]. Andrew B. Kahng, Jens Lienig, Igor L. Markov, and Jin Hu, VLSI Physical Design: From Graph Partitioning to Timing Closure, Springer, 2011; Springer Download
[2]. Wang, Chang, and Cheng (Ed.), Electronic Design Automation: Synthesis, Verification, and Test, Morgan Kaufmann, 2009.
[3]. Chang and Chen, “Design for Manufacturability and Reliability,” IEEE Circuits and Systems Magazine, Sep. 2009.
[4]. Meil H. E. Weste and David Money Narris, "CMOS VLSI Design: A circuits and Systems Perspective", fourth edition, Addison-Wesley
All the above electoric resources are available here
The following references are for labs
[5]. Design Compiler Documents(Logic Design)
[6]. Unix Tutorial for Beginners VI Help EMACS Help Server.Login.Tutorial
[7]. IEEE Std 1364-2005. Verilog Hardwar Description Language. Piscataway, New Jersey: The IEEE Computer Society, 2005. [Revised in 2001 and reaffirmed, with System Verilog added compatibility, in 2005. If you plan to do any serious work in verilog, you should have a copy of the standard. It is not oly normative, but it includes numerous examples and explanatory notes concering every detail of the language.]
[8]. IC Compiler Documents(Physical Design)
[9]. Project Resources