集成电路自动化设计方法 (Design Automation of VLSI) |
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| 上课时间：2013年秋季学期 星期二 6,7 2:00PM - 3:35PM | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 上课地点：3A114 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 实验时间地点：星期二 3:45PM ~ 5:15PM， 电四楼209-211 (嵌入式系统实验室) | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 答疑时间： 周一 2:00PM - 3:00PM，科技实验楼西楼720，或发邮件至songch@ustc.edu.cn | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 电话：0551-63602675 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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Schedule [lecture notes are downloadable inside the campus] |
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| Lecture | Date | Topic | Slides | References | Assignments | Due |
| 1 | Sept. 3, 2013 | Guidance | ppt pdf | |||
| 2 | Sept. 10, 2013 | Design Methodologies | ppt pdf | [3].Chapter_14 | ||
| 3 | Sept. 17, 2013 | Timing | ppt pdf | [3].Chapter_10 | ||
| 4 | Sept. 24, 2013 | Delay | ppt pdf | [3].Chapter4 and Chapter 6 | Lab 1: Tutorial, Verilog-Basics-1: pdf ppt | |
| - | Oct. 1, 2013 | Lab 1 Supplemental Exercise | ||||
| 5 | Oct. 8, 2013 | Logic Optimization | ppt pdf | [1].Chapter_6 | Lab 2: Tutorial | |
| 6 | Oct. 15, 2013 | Verilog Design Example-1 | ppt pdf | Lab 3: Tutorial, Verilog-Basics-2: pdf ppt, Homework-1 | ||
| 7 | Oct. 22, 2013 | Power | ppt pdf | [3].Chapter5 | Lab 4: Tutorial | |
| - | Oct. 29, 2013 | - | - | - | ||
| 8 | Nov. 5, 2013 | Chip Planning | ppt pdf | [2].Chapter_3 [1].Chapter_10 | Lab 5: Tutorial | |
| 9 | Nov. 12, 2013 | Placement | ppt pdf | [1].Chapter 11, [2].Chapter 4 | Lab 6: Tutorial | |
| 10 | Nov. 19, 2013 | Routing | ppt pdf | [1].Chapter 12, [2].Chapter 5, 6 | Lab 7: Tutorial | |
| 11 | Nov. 26, 2013 | Lab 8, 9, 10: Tutorial |
[1]. Wang, Chang, and Cheng (Ed.), Electronic Design Automation: Synthesis, Verification, and Test, Morgan Kaufmann, 2009.
[2]. Sung Kyu Lim, Practical Problems in VLSI Physical Design Automation, Springer, 2008.
[3]. Meil H. E. Weste and David Money Narris, "CMOS VLSI Design: A circuits and Systems Perspective", fourth edition, Addison-Wesley. Web Enhanced
All the above electoric resources are available here
The following references are for labs
[4]. VCS Documents (Simulation)
[5]. Design Compiler Documents (Logic Design)
[6]. Unix Tutorial for Beginners VI Help EMACS Help Server.Login.Tutorial
[7]. IEEE Std 1364-2005. Verilog Hardwar Description Language. Piscataway, New Jersey: The IEEE Computer Society, 2005. [Revised in 2001 and reaffirmed, with System Verilog added compatibility, in 2005. If you plan to do any serious work in verilog, you should have a copy of the standard. It is not oly normative, but it includes numerous examples and explanatory notes concering every detail of the language.]
[8]. IC Compiler Documents(Physical Design)