Research:

Prof. Wang's research interests include FPGA design, Reconfigurable Architecture, Computer Architecture, and Embedded Systems Design. Specifically, recent research projects he has been involved include Big Data Accelerators, Neural Network Processors, and Heterogeneous Systems. His research is supported by NSFC, ICT-CAS, Cambricon, Huawei, CCF-Tencent, and CCF-VenusTech.

1. Big Data Accelerators

Big data applications are challenged by extremely large amount of data, usually in terabytes (TB), or petabytes(PB), even exabytes (EB). Our research aims at novel FPGA-based heterogeneous multi-core system, targeting at accelerating the big data applications. In particular, we focus on following applications: 1) Machine Learning and Data Mining; 2) Graph Processing, and 3) Genome Sequencing.

Selected Publications:

1. [TCBB] Chao Wang, Xi Li, Peng Chen,  Xuehai Zhou, Aili Wang and Hong Yu, “Heterogeneous Cloud Framework for Big Data Genome Sequencing”, IEEE/ACM Transactions on Computational Biology and Bioinformatics. 

2. [DATE] Chao Wang, Xi Li, Xuehai Zhou, SODA: Software Defined FPGA based Accelerators for Big Data, Design, Automation and Test in Europe, 2015.

3. [SPAA] Chao Wang, Xi Li, Aili Wang and Xuehai Zhou: Brief Announcement: MIC++: Accelerating Maximal Information Coefficient Calculation with GPUs and FPGAs, 28th ACM Symposium on Parallelism in Algorithms and Architectures.

2. Neural Network Processors

Neural Network is playing an important role in Artificial Intelligence and Computer Architecture research. Our study aims at novel FPGA-based processors and accelerators for the cutting-edge neural network topology and applications including: 1) Convolutional Neural Network, 2) Deep Belief Network, and 3) Sparse RNN and LSTM.

Selected Publications:

1. [TCAD]Chao Wang, Lei Gong, Qi Yu, Xi Li, Yuan Xie, Xuehai Zhou, DLAU: A Scalable Deep Learning Accelerator Unit on FPGA, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

2. [ICPADS]Yangyang Zhao, Qi Yu, Xuda Zhou, Xuehai Zhou, Chao Wang and Xi Li, PIE: A Pipeline Energy-efficient Accelerator for Inference Process in Deep Neural Networks, The 22nd IEEE International Conference on Parallel and Distributed Systems.

3. FPGA-based System and Scheduling

FPGA has been demonstrated as an energy efficient platform for accelerators. However, how to accommodate heteronomous architectures with more task-level parallelism is quite challenging. We focus on out-of-order execution on FPGA, and services-based heterogeneous platforms.

Selected Publications:

1. [TPDS] Chao Wang, Xi Li, Yunji Chen, Youhui Zhang, Oliver Diessel, Xuehai Zhou: Service-oriented Architecture on FPGA-based MPSoC, IEEE Transactions on Parallel and Distributed Systems.

2. [TPDS] Chao Wang, Xi Li, Junneng Zhang, Aili Wang, Xuehai Zhou: Hardware Implementation on FPGA for Task-level Parallel Dataflow Execution Engine, IEEE Transactions on Parallel and Distributed Systems.

3. [TC] Chao Wang, Xi Li, Junneng Zhang, Peng Chen, Yunji Chen, Xuehai Zhou, Ray C.C. Cheung: Architecture Support for Task Out-of-order Execution in MPSoCs, IEEE Transactions on Computers.

4. [TACO] Chao Wang, Xi Li, Junneng Zhang, Xuehai Zhou, Xiaoning Nie. “MP-Tomasulo: a Dependency-aware Automatic Parallel Execution Engine for Sequential Programs”. ACM Transactions on Architecture and Code Optimization.